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154
XMEGA A [MANUAL]
8077I–AVR–11/2012
Figure 14-3. Clock and event selection.
The peripheral clock is fed into a common prescaler (common for all timer/counters in a device). Prescaler outputs from 1
to 1/1024 are directly available for selection by the timer/counter. In addition, the whole range of prescaling from 1 to 215
times is available through the event system.
Clock selection (CLKSEL) selects one of the prescaler outputs directly or an event channel as the counter (CNT) input.
This is referred to as normal operation of the counter. For details, refer to “Normal Operation” on page 155. By using the
event system, any event source, such as an external clock signal on any I/O pin, may be used as the clock input.
In addition, the timer/counter can be controlled via the event system. The event selection (EVSEL) and event action
(EVACT) settings are used to trigger an event action from one or more events. This is referred to as event action
controlled operation of the counter. For details, refer to “Event Action Controlled Operation” on page 155. When event
action controlled operation is used, the clock selection must be set to use an event channel as the counter input.
By default, no clock input is selected and the timer/counter is not running.
14.5
Double Buffering
The period register and the CC registers are all double buffered. Each buffer register has a buffer valid (BV) flag, which
indicates that the buffer register contains a valid, i.e. new, value that can be copied into the corresponding period or CC
register. When the period register and CC channels are used for a compare operation, the buffer valid flag is set when
data is written to the buffer register and cleared on an UPDATE condition. This is shown for a compare register in Figure
14-4 on page 154.
Figure 14-4. Period and compare double buffering.
When the CC channels are used for a capture operation, a similar double buffering mechanism is used, but in this case
the buffer valid flag is set on the capture event, as shown in Figure 14-5. For capture, the buffer register and the
clkPER /
2
{0,...,15}
CKSEL
CNT
EVACT
clkPER /
{1,2,4,8,64,256,1024}
Common
Prescaler
clkPER
event channels
(Encoding)
Event System
EVSEL
Control Logic
events
BV
UPDATE
"write enable"
"data write"
=
CNT
"match"
CCxBUF
CCx
EN
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